Work

FPGA Based Hardware Accelerator for Training Implicit Neural Representations on Edge Devices

Year: 2024

Type: conference-paper

Source: International Conference on Intelligent Systems and Embedded Design (ISED)

DOI: 10.1109/ised63599.2024.10957434

Authors: Shaik Mohammed Waseem, Imrose Batterywala, Subir K Roy, Sachit Rao

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4409475580

FWCI:

Cites: 7

Cited by:

Related to: 10