Year: 2025
Type: conference-paper
Abstract: The design of cryogenic silicon circuits has gained much importance in recent years, in particular for applications such as quantum computers that require interface electronics with ultra-low levels of power consumption at temperatures as low as 4 K. The design of these circuits is complicated due to the lack of standard design kits for their simulation at these temperatures. Alternative approaches to avoid costly design and fabrication cycles are possible, in particular the use of Look-Up-Table (LUT)-based techniques that exploit the characterization of components at cryogenic temperature. In this paper, we illustrate this approach for the design of an RF Low Noise Amplifier (LNA) using a 28 nm FD-SOI technology that has been characterized at cryogenic temperatures.
Institutions: STMicroelectronics (France), Institut polytechnique de Grenoble, Centre National de la Recherche Scientifique, Techniques of Informatics and Microelectronics for Integrated Systems Architecture, Université Grenoble Alpes, Commissariat à l'Énergie Atomique et aux Énergies Alternatives, CEA Grenoble, Laboratoire d'Électronique des Technologies de l'Information
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
Funder: Agence Nationale de la Recherche
OpenAlex ID: W4409536623