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Reconfigurable parallel photonic matrix-vector multiplication processor based on multi-dimensional multiplexing

Year: 2025
Type: article
Abstract: Matrix-vector multiplication (MVM) operations play an important role in applications such as data processing and artificial neural networks. To meet the growing demand for computing power, the photonic MVM processor provides what we believe to be a new computing architecture. In this paper, we propose a reconfigurable parallel MVM (RP-MVM) processor. To further improve the parallel computing dimension, wavelength division multiplexing (WDM) and digital subcarrier multiplexing (DSM) technologies were first incorporated into the photonic MVM. Compared with the traditional WDM-MVM architecture, the parallelism of RP-MVM scheme is increased by N times, where N is the carrier number of DSM signal. Moreover, the input data channel can be dynamically adjusted without changing the hardware scale, which improves the flexibility of computing system. The simulation results show that the RP-MVM scheme can achieve parallel computing operations of eight MVMs, with a computing speed of 128 GOPs. For a random 6-bit resolution data sequence, the root mean square error (RMSE) of calculation results is on the order of 1E-3. In addition, for the image edge extraction task based on Roberts operator, this scheme can realize the parallel processing of four grayscale images. Therefore, the proposed scheme provides an alternative approach for realizing a highly parallel and reconfigurable large-scale photonic MVM architecture.
DOI: 10.1364/oe.558224
Authors: Yanfeng Bi, Xingyu Wu, Chenrui Fan, Lufan Zhang, Chuan Wang
Language: English
Open Access status: gold
Estimated APC paid: $2,270
OpenAlex ID: W4409622017
FWCI: 1.649
Cites: 35
Cited by: 4
Related to: 10