An Enhanced and Improved Half-Life Variable Quantum Time Round Robin (EImHLVQTRR) CPU Scheduling Algorithm
Year: 2025
Type: article
Abstract: The processing speed and powers of Computer systems is a function of Central Processing Unit (CPU) efficiency. Depending on the algorithm used to implement a particular system, the turnaround time, waiting time, response time, and number of context switch are responsible for reducing CPU idle time and, overall, slowing down computer system processing power. There are many existing scheduling algorithms; among them is the “Improved Half Life Variable Quantum Time with Mean Time Slice Round Robin (ImHLVQTRR) Algorithm,” which has been proposed to address the starvation problem – delay in access to the requested resources experienced in most of the earlier algorithms. This paper aims to enhance (the ImHLVQTRR) algorithm by modifying the time quantum (TQ), thereby improving system performance. To achieve this, a square root of the product of the processes average burst time and minimum burst time was computed to determine the TQ. The computed TQ is then used to execute RQ processes in an iterative manner within a specified period of time until the ready queue is empty. Overall, the experimental analysis shows that the proposed (EImHLVQTRR) algorithm performed better in terms of AWT of 371ms as against 390ms and 371ms, ATAT of 399ms as against 423ms and 399ms, ART of 71ms as against 236ms and 88ms and NCS of 91 as against 46 and 65; AWT of 326ms as against 350ms and 326ms, ATAT of 351ms as against 378ms and 351ms, ART of 51ms as against 153ms and 59ms and NCS of 77 as against 45 and 57 in both Zero and Non-Zero Arrival Time simulation results for the processes generated as shown in Figure 10 & 13 respectively. The experimental results also show some significant improvement as the ATAT of 22.6ms as against 27.2ms and 29.6ms, AWT of 13.4ms as against 18.0ms and 20.4ms, ART of 4.8ms as against 9.0ms and 11.8ms with equal number of context switch for Zero Arrival Time; ATAT of 30.6ms as against 32.2ms and 40.6ms, AWT of 18.6ms as against 20.2ms and 28.6ms, ART of 18.6ms as against 10.6ms and 11.2ms and NCS of 4 as against 6 and 7 for Non-Zero Arrival Time experimental summary results shown in Table 3 & 4.
Source: UMYU Scientifica
Authors: Suleiman Ebaiya Abubakar, Ibrahim Isa
Language: English
Topic: Real-Time Systems Scheduling
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: diamond
Funder: Tertiary Education Trust Fund
OpenAlex ID: W4409623306