Work

AIL-DNN: Modeling of IC Interconnect Parasitic Capacitances Based on Adaptive Incremental Learning

Year: 2025

Type: article

Source: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI: 10.1109/tcad.2025.3562947

Authors: Ziwei Yu, Shuai Yan, Yaxing Zhou, Xiaoyu Xu, Zhuoxiang Ren

Institutions: Chinese Academy of Sciences, Institute of Electrical Engineering, University of Chinese Academy of Sciences, Centre National de la Recherche Scientifique, Université Paris-Saclay, Laboratoire de Génie Électrique et Électronique de Paris, Sorbonne Université, CentraleSupélec

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funder: Chinese Academy of Sciences

Award: G6086626954

OpenAlex ID: W4409640874

FWCI: 0.693

Cites: 10

Cited by: 3

Related to: 10