Work

A Novel Optimal Sampling Digital PLL Design With High Performance and Alleviated Hardware for IOT Applications

Year: 2025

Type: article

Source: International Journal of Communication Systems

DOI: 10.1002/dac.70107

Authors: Muralidharan J, Suresh Kumar Pittala, L. Megalan Leo, A. Jerrin Simla

Institutions: KPR Institute of Engineering and Technology, Sathyabama Institute of Science and Technology, Saveetha University

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4409732755

FWCI:

Cites: 40

Cited by:

Related to: 10