Work

Power-Area Optimized Multiplier Design using In-Memory Computation

Year: 2025

Type: conference-paper

Source: International Conference on Integrated Circuits and Communication Systems (ICICACS)

DOI: 10.1109/icicacs65178.2025.10968138

Authors: Veerubhotla Sri Pranav, M. Vinodhini

Institution: Amrita Vishwa Vidyapeetham

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4409763301

FWCI: 18.87

Cites: 15

Cited by: 8

Related to: 10