Latch and Flip-Flop Design Using Memristors and Transmission Gates with Timer Counter Implementation
Year: 2025
Type: conference-paper
Authors: Aditya Rayer, Mavulluru Ganesh, Lavi Tanwar
Institution: Delhi Technological University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4409763350