A Low-Jitter Fractional- N Digital PLL With Spur Cancellation Based on a Multi-DTC Topology
Year: 2025
Type: article
Institutions: Politecnico di Milano, Infineon Technologies (Austria)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4409795989
