Work

Power-Efficient Hybrid-Style Full Adders Utilizing High-Speed Xor-Xnor Circuits

Year: 2024

Type: conference-paper

Source: IEEE Uttar Pradesh Section International Conference on Electrical, Electronics and Computer Engineering (UPCON)

DOI: 10.1109/upcon62832.2024.10982948

Authors: Archana Verma, Arun Kumar Singh, Ashwini Kumar Upadhyay, Ajay Patel, Anchal Singh

Institution: Rajkiya Engineering College Kannauj

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4410296007

FWCI: 1.6

Cites: 29

Cited by: 2

Related to: 10