Work

Design and Analysis of PVT Tolerant and Fast-Settling Wideband CP-PLL Frequency Synthesizer

Year: 2025

Type: conference-paper

Source: International Conference on Device Intelligence, Computing and Communication Technologies (DICCT)

DOI: 10.1109/dicct64131.2025.10986422

Authors: Archana Singhal, Dheeraj Singh Rajput, Dharmendra Boolchandani, C. Periasamy

Institution: Malaviya National Institute of Technology Jaipur

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4410296175

FWCI: 2.325

Cites: 15

Cited by: 1

Related to: 10