Work

Design and Analysis of a 4-bit Wallace Tree Multiplier using 180nm CMOS Technology

Year: 2025

Type: conference-paper

DOI: 10.1109/ictmim65579.2025.10988083

Authors: Tamil Selvan H, Navaneethakrishnan Naveenshankar, Kaviprashanna Krishnamoorthy, R. Seetharaman

Institutions: Anna University, Chennai, National Institute of Technology Tiruchirappalli

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4410296576

FWCI: 2.358

Cites: 12

Cited by: 1

Related to: 10