Work

RLUT: A Reduced LUT Architecture with Fine-Grained Scalability and Its Automatic Design Flow for Large Frequent Functions

Year: 2025

Type: article

Source: ACM Transactions on Reconfigurable Technology and Systems

DOI: 10.1145/3737291

Authors: Moucheng Yang, Chengyu Zeng, Kaixiang Zhu, Lingli Wang

Institution: Fudan University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: National Science and Technology Major Project

Award: G3261762312

OpenAlex ID: W4410644240

FWCI: 0.453

Cites: 29

Cited by: 2

Related to: 10