Implementation of FPGA-Based Neural Network Controller for Reducing Speed Ripple for a PMSM-Driven EV Using MRAS Speed Estimator
Year: 2025
Type: article
Authors: Sanjay Kumar Kakodia, Giribabu Dyanamina
Institution: Maulana Azad National Institute of Technology
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4410737658