Work

RapidPnR: Accelerating the Physical Design for FPGAs via Design-Level Parallelism

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)

DOI: 10.1109/fccm62733.2025.00050

Authors: Wanzheng Weng, Pingqiang Zhou

Institution: ShanghaiTech University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4410810364

FWCI:

Cites: 4

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Related to: 10