Work

Optimizing Power Consumption: CSD-Based 16-Bit Multiplier for Low-Power Systems

Year: 2025

Type: conference-paper

Source: Devices for Integrated Circuit (DevIC)

DOI: 10.1109/devic63749.2025.11012379

Authors: K. V. Gowreesrinivas, S. Rahul, K. Arjun, B. Sushma, Ch. Mohan Sai

Institution: Anil Neerukonda Institute of Technology & Sciences

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4410853454

FWCI:

Cites: 11

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Related to: 10