Work

Low-Power Multiplier-Less VLSI Design and Implementation of Linear Convolution Using Vedic Mathematics

Year: 2025

Type: book-chapter

Source: Lecture notes in electrical engineering

DOI: 10.1007/978-981-95-3893-5_13

Authors: Udisha Gangopadhyay, Sudip Ghosh, Hafizur Rahaman

Institution: Indian Institute of Engineering Science and Technology, Shibpur

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4410855177

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Cites: 11

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Related to: 10