Work

A 12-Bit 10-MS/s SAR ADC with 3-Bit Redundancy Capacitors

Year: 2025

Type: conference-paper

Source: International Conference on Sensors and Information Technology (ICSI)

DOI: 10.1109/icsi64877.2025.11009331

Authors: Zheng Zou, Xiaolong Li

Institution: Jiangsu University of Science and Technology

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4410855208

FWCI: 2.903

Cites: 20

Cited by: 1

Related to: 10