Design Methodology and Robustness Analysis of a 13–15 GHz Three-Stage Low-Noise Amplifier in pHEMT GaAs Technology
Year: 2025
Type: article
Abstract: This work presents a novel three-stage low-noise amplifier (LNA) design methodology. The first two stages consist of common-source stages with inductive source degeneration, while the third stage consists of an RC network attached before the common-source FET transistor. The input matching network is designed to meet the optimum noise measurement termination, which results in a noise Figure of less than 1.6 dB. The highest gain level of 25 dB was measured, and the input and output reflection coefficients are better than 10 dB for the operating bandwidth, i.e., 13–15 GHz. The LNA’s large signal performance and robustness against continuous high input power and pulse waves are reported. This LNA can handle up to 15 dBm input pulse of 50 nS width and 10% duty cycle, and 18 dBm continuous wave without noticing an increment in the forward gate current.
Source: Electronics
Institution: University of Rome Tor Vergata
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,896
OpenAlex ID: W4410864089