Work

A Precise and Low Power Analog Spiking Neural Network Exploiting Pre‐Charged Current Mode Synapses and Coarse‐Fine Neuron Comparators

Year: 2025

Type: article

Abstract: ABSTRACT This paper proposed a precise and low power analog spiking neural network (SNN). It decreases the membrane current error and improves linearity of SNN with the proposed pre‐charged current‐mode synapses. Also, it reduces the neuron power consumption by replacing a static amplifier with an event‐driven coarse‐fine comparator. The proposed analogue SNN chip was fabricated using a 65 nm process. Its area is 2.4 × 2.77 mm 2 with 1024 × 256 synapses. The membrane capacitor is 4 pF. The pre‐charged synapse reduces the membrane current error by 15.38%. The event‐driven coarse‐fine comparator saves 49% neuron power.

Source: Electronics Letters

DOI: 10.1049/ell2.70318

Authors: Kyu‐Dong Hwang, Kwang‐Il Oh, Jae‐Jin Lee, Min‐Woo Kim, Byung‐Do Yang

Institutions: Electronics and Telecommunications Research Institute, Chungbuk National University

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: gold

Estimated APC paid: $2,590

Funders: National Research Foundation, National Research Foundation of Korea, Ministry of Science and ICT, South Korea, Institute for Information and Communications Technology Promotion