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A Sige Channel Gate-All-Around Transistor Fabricated Using Novel Cyclic Self-Limiting Wet Etching Combined with SI Removal Process

Year: 2025

Type: conference-paper

DOI: 10.1109/cstic64481.2025.11017937

Authors: KaiMin Feng, HaoYan Liu, HuaiZhi Luo, Xi Zhang, YongLiang Li

Institution: Chinese Academy of Sciences

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funders: National Natural Science Foundation of China, Chinese Academy of Sciences

OpenAlex ID: W4410986469

FWCI: 2.3

Cites: 6

Cited by: 1

Related to: 10