Work

Hierarchical Optimization Algorithm for the Automatic Design of Analog Integrated Circuit

Year: 2025

Type: conference-paper

DOI: 10.1109/cstic64481.2025.11017809

Authors: Yu Zong, Jing Wan

Institutions: Fudan University, State Key Laboratory of ASIC and System

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: Fudan University

OpenAlex ID: W4410987574

FWCI: 2.903

Cites: 2

Cited by: 1

Related to: 10