A Low-Latency, Highly-Pipelined Hardware Architecture for H.266/VVC Dependent Quantization
Year: 2025
Type: article
Authors: Jun Zhang, Weizhi Bian, Hao Zhang
Institution: Central South University
Language: English
Subfield: Signal Processing
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4411086253
