Work

Stop Taking the Scenic Route: the Shortest Distance Between the CPU and the NIC is MMIO

Year: 2025

Type: conference-paper

Abstract: What is the fastest way to transfer data from the CPU to a network interface card (NIC)? Conventional wisdom suggests that the answer is direct memory access (DMA), and recent works have advocated for leveraging cache-coherent I/O interconnects. However, in this paper we examine the arguments against memory-mapped I/O (MMIO) and show that high write throughput can be achieved with MMIO by relaxing ordering constraints. We also propose efficient hardware for recovering ordering at the NIC to ensure correctness while taking advantage of the performance benefits of unordered MMIO writes.

Source: Workshop on Hot Topics in Operating Systems

DOI: 10.1145/3713082.3730389

Authors: Wei Siew Liew, Md Ashfaqur Rahaman, James McMahon, Ryan Stutsman, Vijay Nagarajan

Institution: University of Utah

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: hybrid

Funders: National Science Foundation, VMware, Universitas Brawijaya

Awards: G3714965626, CSR: Small: Cache-Coherent Accelerators for Efficient Persistent Memory Programming