Work

Design and Comparative Analysis of Half and Full Adders Using CMOS and Pass Transistor Logic Styles

Year: 2025

Type: conference-paper

Source: International Conference on Smart Systems for Applications in Electrical Sciences (ICSSES)

DOI: 10.1109/icsses64899.2025.11010034

Authors: Kusuma H S, H.M Kalpana, Ravi H. K

Institution: Siddaganga Institute of Technology

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4411204323

FWCI: 4.65

Cites:

Cited by: 2

Related to: 10