Optimizing Analog Circuit Design Through a Machine Learning‐Assisted Evolutionary Algorithm
Year: 2025
Type: article
Abstract: ABSTRACT Evolutionary algorithms (EAs) based on circuit simulation are widely employed for analogue circuit sizing because of their high accuracy and adaptability in various cases. However, most of the existing research is focused on a limited set of analogue integrated circuit design specifications. When addressing a complete specification set, the extensive number of simulations required becomes impractical for large circuits. Recent studies incorporating machine learning (ML) techniques have accelerated the optimization process but still involve high simulation costs. This paper proposes an improved and efficient ML‐assisted evolutionary algorithm for analogue circuit sizing. The proposed approach integrates a machine learning model into the EA optimization process, effectively reducing the number of required simulations and improving the convergence speed. The experimental results demonstrate the efficiency of the proposed methodology in achieving reliable optimization, with a significant reduction in simulation cost and improved convergence.
Source: Electronics Letters
DOI: 10.1049/ell2.70331
Authors: Yu‐Yu Chen, Shao‐Yun Fang
Institution: National Taiwan University of Science and Technology
Language: English
Subfield: Artificial Intelligence
Field: Computer Science
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,590
Award: G8379512466
OpenAlex ID: W4411255912
