Wafer scale assessment of dislocation defects on SiC wafers using a convolutional neural network
Year: 2025
Type: article
Abstract: Wide bandgap semiconductors, such as SiC, are expected to surpass traditional silicon-based technologies in high-power electronics applications, owing to their potential for reduced size, weight, and enhanced power efficiency. SiC, in particular, has evolved significantly, reaching a maturity that enables its adoption in high-voltage applications including power modules. However, the current state-of-the-art SiC epitaxial wafers face significant challenges, primarily due to the presence of threading dislocations, basal plane dislocations, stacking faults, polytype inclusions, and screw dislocations. These structural imperfections lead to electron and hole carrier scattering, which impairs device performance. Addressing this, the present research introduces a novel approach employing a convolutional neural network (CNN) trained to identify and quantify dislocation defects with high precision. Analysis of the models shows it both highlights the features of interest and delineates the shape, size, and number of the dislocations with higher accuracy than the manual labeling used to train the model, suggesting that CNN has successfully captured the subtle details needed to identify dislocations defects.
Institution: United States Naval Research Laboratory
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $3,325
Funder: U.S. Naval Research Laboratory
OpenAlex ID: W4411334685