Work

Efficient FPGA Implementation of a High- Performance, Low-Complexity LDPC Decoder for Next-Gen Communication Systems

Year: 2025

Type: conference-paper

DOI: 10.1109/icfts62006.2025.11031516

Authors: M. Paramaiyappan, S.Palanivel Rajan

Language: English

Topic: Error Correcting Code Techniques

Subfield: Computer Networks and Communications

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4411485228

FWCI: 1.286

Cites: 14

Cited by: 1

Related to: 10