Year: 2025
Type: article
Abstract: This research explores the implementation of a transistor-based 8-bit CPU inspired by the RISC architecture and built entirely using TTL logic from the 74HC/LS series. The system features a minimal instruction set architecture with 8-bit wide instructions comprising a 4-bit opcode and a 4-bit address, enabling basic operations such as addition, subtraction, data transfer, and control flow. A total memory of 128 bits is accessed via an 8-bit data bus, with a program counter and instruction register facilitating sequential execution. Control logic [6 4] is driven through ARDUINO-based microcode, while arithmetic operations are handled by a discrete ALU supporting two’s complement logic, supported by direct access to two 8-bit registers. Output is visualized using a 4-digit seven-segment display connected via an output register. The project demonstrates a fundamental understanding of digital systems, instruction sequencing, and low-level computing using discrete logic components [2 15]
Authors: Ayushman Bhattacharya, Anwesha Chakraborty, Vivek Yadav, Piyali Sarkar, Sonali Bhowmik, Dr. Dipankar Misra, Prof. (Dr.) Sumit Nandi
Institution: JIS University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: bronze
OpenAlex ID: W4411565800