Work

Implementation of Power optimized Adiabatic Logic of Full adder circuit

Year: 2025

Type: conference-paper

Source: International Conference on Research Methodologies in Knowledge Management, Artificial Intelligence and Telecommunication Engineering (RMKMATE)

DOI: 10.1109/rmkmate64874.2025.11042818

Authors: Ms. N Shivaanivarsha, Agalya M, Parthasarathi S, Rajalakshmi K, Karthikeyan S, Lokith Sharan R

Institution: Sri Sairam Engineering College

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDGs: Industry, innovation and infrastructure, Affordable and clean energy

Open Access status: closed

OpenAlex ID: W4411640359

FWCI:

Cites: 11

Cited by:

Related to: 10