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Digital Twin-Based Architecture for Run-Time Power Modeling for Sensorless Edge Devices

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11044115

Authors: Parveen Nisha, Ratnala Vinay, Kartik Laad, Amit Acharyya

Institution: Indian Institute of Technology Hyderabad

Language: English

Topic: Energy Efficiency in Computing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDGs: Industry, innovation and infrastructure, Affordable and clean energy

Open Access status: closed

OpenAlex ID: W4411725054

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Cites: 15

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Related to: 10