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A 2.9mW Inverter-based Quadrature Phase Clock Generator with ± 0.29° Phase Error

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043332

Authors: Mayank Kumar Singh, M. Bhuvanesh, R. Nagulapalli, Devarshi Mrinal Das, Mahendra Sakare

Institutions: Indian Institute of Technology Ropar, Oxford Brookes University

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4411725254

FWCI: 2.358

Cites: 22

Cited by: 1

Related to: 10