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Hardware Efficient Accelerator for Spiking Transformer With Reconfigurable Parallel Time Step Computing

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043330

Authors: Bo-Yu Chen, Tian-Sheuan Chang

Institution: National Yang Ming Chiao Tung University

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4411725408

FWCI: 9.107

Cites: 13

Cited by: 4

Related to: 10