Work

Verilog-A modeling of Floating-Gate (FG)-based Multiple-Input Translinear Elements

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043394

Authors: Charana Sonnadara, Sahil Shah

Institution: University of Maryland, College Park

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4411725534

FWCI:

Cites: 12

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Related to: 10