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A Mutually Coupled High Speed Multi-Phase Clock Distribution Scheme for Improved Signal Integrity

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043754

Authors: Raghavendra Rukmani Gowrishankar, Kiran Baby, Soumya Ranjan Nayak

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4411725670

FWCI:

Cites: 6

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Related to: 10