Work

A 41.7 MS/s 2.4 ps-rms-jitter Time Converter With 4-Core Interleaved Analog-Multiplexed Architecture

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043405

Authors: Francesco Malanga, Mehmet Caglar Koca, Mehmet Ali Uluisik, Giulia Acconcia, Ivan Rech

Institution: Politecnico di Milano

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4411725975

FWCI:

Cites: 17

Cited by:

Related to: 10