Work

Enhanced Time Amplifier with Trimming Voltage for Error Reduction in Time-to-Digital Converters

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043448

Authors: Javad Ahmadi-Farsani, Ion Vornicu, Laurentiu Acasandrei

Institution: Silicon Austria Labs (Austria)

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funder: Silicon Austria Labs

OpenAlex ID: W4411726211

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Cites: 11

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Related to: 10