Work

High-Performance Co-Processing Architecture Using SOT-MRAM-Based In-memory Computing Scheme

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11044137

Authors: Kai Tian, Bi Wu, Ke Chen, Weiqiang Liu

Institution: Nanjing University of Aeronautics and Astronautics

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

Funder: National Natural Science Foundation of China

OpenAlex ID: W4411726258

FWCI: 0.928

Cites: 11

Cited by: 1

Related to: 10