Work

VLSI Architecture for FIR Filter using Radix-4 Booth Multiplier and Common Boolean Logic Adder

Year: 2025

Type: conference-paper

Source: International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI)

DOI: 10.1109/raeeucci63961.2025.11048337

Authors: Arpit, Archna Sharma, Sandip Nemade

Language: English

Topic: Digital Filter Design and Implementation

Subfield: Signal Processing

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4411726273

FWCI: 1.95

Cites: 16

Cited by: 2

Related to: 10