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A Linear-Regression-Assisted Trimming Scheme for CMOS Voltage Reference

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11044284

Authors: Chengyu Che, Yao Jiang, Xinfei Guo, Ka-Meng Lei, Rui Martins, Pui-In Mak

Institutions: University of Macau, Shanghai Jiao Tong University, University of Michigan

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funder: Technology Development

OpenAlex ID: W4411726310

FWCI:

Cites: 13

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Related to: 10