Work

Design of Advanced Encryption Standard using Verilog-Hardware Descriptive Language

Year: 2025

Type: conference-paper

Source: International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI)

DOI: 10.1109/raeeucci63961.2025.11048230

Authors: Vivek Kachhatiya, T. Sai Harsha Vardhan, K. Advaith, Y Ramanjaneya Reddy

Institution: SRM Institute of Science and Technology

Language: English

Topic: Cryptographic Implementations and Security

Subfield: Artificial Intelligence

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4411726468

FWCI:

Cites: 26

Cited by:

Related to: 10