Work

A Fast Transient FVF LDO With Improved Gate Buffer and Level Triggered Transient Enhancement Circuit in 22 nm process

Year: 2025

Type: conference-paper

Source: IEEE International Symposium on Circuits and Systems proceedings

DOI: 10.1109/iscas56072.2025.11043382

Authors: Jianjun Zhu, Wanqing Wu, Haigang Feng, Songping Mai, Xian Tang

Institutions: Tsinghua Shenzhen International Graduate School, Tsinghua University

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4411726529

FWCI: 8.708

Cites: 8

Cited by: 3

Related to: 10