A Low-Power, Versatile Capacitance Interface ASIC Based on Pulse-Width Modulation with Real-Time Dynamic Range Matching
Year: 2025
Type: conference-paper
Abstract: Capacitive sensing is commonly employed to measure a wide range of physical quantities, including displacement, humidity, and pressure. Readout accuracy, speed, and power consumption are among the key performance characteristics during the design process for meeting the specific demands of the sensor application. Minimum parasitic effects in capacitance-to-time converters offer high suitability in precise, high-resolution applications that demand low sensitivity to environmental effects, such as in biomedical sensing devices. However, the design tradeoffs in the measurement range, resolution, and speed often limit device performance and require manual adjustment of the sensing front-end. This paper describes a low-power readout circuit for high-resolution capacitance sensing across a wide input range of up to 200 pF. A pulse-width-modulation-based, capacitance-to-time (C-T) converter is presented in 65-nm CMOS technology for miniaturised applications. Real-time monitoring of the output enables automatic adjustment of the sensing parameters that determine range, resolution, and speed, providing a flexible solution to the application needs. The system provides rapid conversion of single- and differential-mode capacitors with a 50-μs readout time while consuming 25 μW from a 1-V supply.
Institution: University College London
Language: English
Subfield: Biomedical Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W4411726802