Year: 2024
Type: conference-paper
Abstract: This research aims to optimize the instruction scheduling of LLVM back end through improved genetic algorithm to improve the execution efficiency of the object code generated by the compiler. Considering the characteristics of target hardware and optimization objectives, the intermediate representation (LLVM IR) information of the compiler is fully used to generate efficient and optimized target machine code, which ensures the performance of the compiled program on various hardware. Genetic algorithms are introduced as a search and optimization technique to automatically explore different instruction scheduling schemes and find the optimal solution. Through the introduction of adaptive evaluation mechanism, different scheduling schemes are evaluated based on performance indicators, and then evolved generation by generation to obtain better solutions. The experimental results show that the LLVM back-end instruction scheduling optimization based on genetic algorithm is obviously superior to the traditional method, which provides a strong support for improving the performance of compiler generated code, and provides an empirical research basis for the application of genetic algorithm in compiler optimization.
Authors: Zhening Wang, Jiye Jiao
Institution: Xi’an University of Posts and Telecommunications
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W4411730117