Year: 2024
Type: conference-paper
Abstract: In the context of the digital and intelligent era, image processing has been extensively applied in fields such as computer vision and machine learning. As the foundation of image processing, image preprocessing plays a crucial role. However, image preprocessing involves a large number of intensive operations, traditional processors and instruction sets are difficult to deliver optimal performance. Therefore, this paper based on the processor and instruction set architecture of RISC-V, decomposes the gamma correction algorithm into a suitable way for processor implementation, designs a simple and efficient custom instruction, designs the architecture of the RISC-V processor, and extends the RISC-V GNU toolchain to achieve compiler support for custom instruction. The circuit architecture and custom instruction designed in this paper compress multiple instructions into a single instruction, which reduces the average computation time by 58% and the code size by about 77.26%, improves the compilation efficiency of the compiler and the running speed of the program.
Authors: Juan Liu, Zhihong Huang, Gang Cai, Xihu Wang, Yang Liu
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: gold
OpenAlex ID: W4411730188