Work

Physical Verification and Validation of the Digital Analog and Mixed-Signal Designs for the SCL 180nm CMOS Technology

Year: 2025

Type: conference-paper

Source: IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)

DOI: 10.1109/vlsisata65374.2025.11070154

Authors: Venkata Reddy Kolagatla, Vivian Desalphine

Institution: Centre for Development of Advanced Computing

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4412404775

FWCI:

Cites: 9

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Related to: 10