High-Speed Approximate Adder Design Through Charge Recovery Logic and Hybrid Low Power Technique
Year: 2025
Type: conference-paper
Authors: Vivek Jain, Syed Niha, S Rajasekaran, H Shree Kumar, M V Vamsikrishna, Asif Moiz
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4412404952