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High-Speed and Low-Power Stacked Dynamic Comparator for ADC

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Year: 2025
Type: conference-paper
Source: IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)
DOI: 10.1109/vlsisata65374.2025.11069998
Authors: Arjun S, Varshithram K S, Krishnaprasad B, Umadevi S, Prathiba A
Institution: Vellore Institute of Technology University
Language: English

Topic: Analog and Mixed-Signal Circuit Design
Subfield: Biomedical Engineering
Field: Engineering
Domain: Physical Sciences
SDG: Industry, innovation and infrastructure

Open Access status: closed
OpenAlex ID: W4412405140
FWCI: 2.903
Cites: 11
Cited by: 1
Related to: 10
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