Work

Comparative Analysis of Power and Delay Efficient Dynamic Logic Techniques Under Process Variations

Year: 2025

Type: conference-paper

Source: IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)

DOI: 10.1109/vlsisata65374.2025.11070042

Authors: Giya Mary George, Sreekala K.S.

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4412405194

FWCI: 4.717

Cites: 12

Cited by: 2

Related to: 10