Work

Design and Hardware Implementation of Polar Codes Using Verilog for Digital Systems

Year: 2025

Type: conference-paper

Source: IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA)

DOI: 10.1109/vlsisata65374.2025.11070044

Authors: Yashwanth Pola, Aditya Tiwari, Sarda Sharma, Sandeep Singh Chauhan

Institution: Amrita Vishwa Vidyapeetham

Language: English

Topic: Error Correcting Code Techniques

Subfield: Computer Networks and Communications

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4412405272

FWCI:

Cites: 13

Cited by:

Related to: 10